Z85233 Datasheet, PDF (64/317 Pages) Zilog, Inc. – The Zilog SCC Serial Communication Controller

SCC™/ESCC™ User’s Manual
SCC/ESCC Ancillary Support Circuitry
The formulas relating the baud rate to the time-constant
and vice versa are shown below.
Table 3-1. Baud Rates for 2.4576 MHz Clock and 16x
Clock Factor
Baud
Time Constant
3
Time Constant =
Clock Frequency
-2
2 x (Clock Mode) x (Baud Rate)
Rate
38400
19200
Decimal
0
2
Hex
0000
0002
Baud Rate =
Clock Frequency
2 x (Clock Mode) x (Time Constant+ 2)
9600
4800
6
14
0006
000E
2400
30
001E
1200
62
003E
In these formulas, the BRG clock frequency (PCLK or
600
/RTxC) is in Hertz, the desired baud rate in bits/sec, Clock
300
126
007E
254
00FE
Mode is 1 in sync modes, 1, 16, 32 or 64 in async mode
150
510
01FE
and the time constant is dimensionless. The example in
Table 3-1 assumes a 2.4576 MHz clock (from /RTxC) fac-
tor of 16 and shows the time constant for a number of pop-
ular baud rates.
Other commonly used clock frequencies include 3.6846,
4.6080, 4.91520, 6.144, 7.3728, 9.216, 9.8304, 12.288,
14.7456, 19.6608 (units in MHz).
For example:
TC =
2.4576 x 1100⁶⁶
-2 = 510
(2 x 16) x 150
.
Initializing the BRG is done in three steps. First, the time-
constant is determined and loaded into WR12 and WR13.
Next, the processor must select the clock source for the
BRG by setting bit D1 of WR14. Finally, the BRG is en-
abled by setting bit D0 of WR14 to 1.
Note: The first write to WR14 is not necessary after a hard-
ware reset if the clock source is the /RTxC pin. This is be-
cause a hardware reset automatically selects the /RTxC
pin as the BRG clock source.
UM010901-0601
3-3