Z85233 Datasheet, PDF (306/317 Pages) Zilog, Inc. – The Zilog SCC Serial Communication Controller

APPLICATION NOTES
ZILOG SCC
Z8030/Z8530
QUESTIONS AND ANSWERS
This document addresses the most commonly asked questions about Zilog’s SCC.
These questions fall into the following five categories:
s Hard ware Considerations
s Sychronous Mode
s Interrupt s and Polling
s Miscellaneous Questions
s Asychronous mode
HARDWARE CONSIDERATIONS
This section includes questions and answers on the hard-
ware interface, the clocks, the FIFO, special modes (Local
Loopback, DPLL, Manchester), and internal timing consid-
eration.
Hardware (Includes DMA Interface)
Q. What is the SCC transistor count?
A. Approximately 6000 gates, or 18,000 transistors.
Q. What is the difference between the Z8030 and the
Z8530?
A. The Z8030 and Z8530 are packaged from the same
die. The multiplexed bus (Z8030) or non-multiplexed
bus (Z8530) version of the chip is selected at packag-
ing time by an internal bonding option.
Q. Can /AS be active only when the Z8030 is being ac-
cessed and High all other times?
A. Since the interrupt pending bits (IPs) are updated on
address strobes, interrupts will not occur unless /AS is
continuous.
Q. How do /WR and /CE interact on the Z8530?
A. /WR and /CE are ANDed to enable a transparent latch.
Data is latched on the falling edge when both /CE and
/WR go Low.
Q. How many register pointers does the Z8530 have?
A. The SCC has only one register pointer for both chan-
nels. The SIO (Z844X) has two, one for each channel.
Q. Do you have to write to the pointer with the Z8530
to access WR0 or RR0?
A. No. Both registers are accessed automatically without
first writing to the pointer.
Q. Does /CE (/CS) have to be High during an interrupt
acknowledge cycle?
A. No.
Q. Does the SCC support full duplex DMA?
A. The SCC allows full duplex DMA transfers by using the
DTR/REQ and W/REQ as two separate DMA control
lines for transmit request and receive request on each
channel.
Q. When using full duplex DMA, how do you program
W/REQ?
A. W/REQ should be programmed for receive and
DTR/REQ pin should be programmed for transmit.
Q. Can both channels make simultaneous DMA
requests?
A. Yes.
Q. Do you have to reset the SCC in hardware?
A. No. A software reset is the same as a hardware reset,
(WR9 CO). It also does not matter whether the Z8030
is in shift right or shift left mode because the address
is the same in either.
UM010901-0601
7-1