XC161 Datasheet, PDF (85/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
The Analog/Digital Converter
16.1
Mode Selection
The analog input channels AN15 … AN12, AN7 … AN0 are alternate functions of Port 5
which is an input-only port. The Port 5 lines may either be used as analog or digital
inputs. For pins that shall be used as analog inputs it is recommended to disable the
digital input stage via register P5DIDIS. This avoids undesired cross currents and
switching noise while the (analog) input signal level is between V_IL and V_IH.
The functions of the A/D converter are controlled by two sets of bit-addressable control
registers. In compatibility mode, registers ADC_CON and ADC_CON1 are used, in
enhanced mode, registers ADC_CTR0, ADC_CTR2, and ADC_CTR2IN are used. Their
bitfields specify the analog channel to be acted upon, the conversion mode, and also
reflect the status of the converter.
16.1.1 Compatibility Mode
In compatibility mode (MD = 0), registers ADC_CON and ADC_CON1 select the basic
functions. The register layout is compatible with previous versions of the ADC module,
while providing limited options.
ADC_CON
ADC Control Register
SFR (FFA0_H/D0_H)
15 14 13 12 11 10 9 8 7 6
ADCTC
rw
ADSTC
AD AD AD AD AD
CRQ CIN WR BSY ST
-
rw
rwh rw rw rwh rwh -
Reset Value: 0000_H
543210
ADM
rw
ADCH
rw
Field
ADCTC
ADSTC
ADCRQ
ADCIN
Bits Type
[15:14] rw
[13:12] rw
11
rwh
10
rw
Function
ADC Conversion Time Control (Defines the ADC
basic conversion clock f_BC)
00 f_BC = f_ADC/4
01 f_BC = f_ADC/2
10 f_BC = f_ADC/16
11 f_BC = f_ADC/8
ADC Sample Time Control (Defines the ADC
sample time in a certain range)
00 t_BC × 8
01 t_BC × 16
10 t_BC × 32
11 t_BC × 64
ADC Channel Injection Request Flag
ADC Channel Injection Enable
User’s Manual
ADC_X1, V2.1
16-3
V2.2, 2004-01