XC161 Datasheet, PDF (160/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Asynchronous/Synchronous Serial Interface (ASC)
Table 18-1 Formulas for IrDA Pulse Width Calculation
PMW
PMW_IPMW Formulas
1 … 255 0
t_IPW = -1---6-----_×-----B----a-3---u---d----r--a----t--e--
t_{IPW min}
=
(_---P_----M_-----W_------->_---->_-----1_----)
f_ASC
1
t_IPW
=
P-----M-----W----
f_ASC
The contents of PW_VALUE further define the minimum IrDA pulse width (t_{IPW min}) that
is still recognized as a valid IrDA pulse during a receive operation. This function is
independent of the selected IrDA pulse width mode (fixed or variable) which is defined
by bit IRPW. The minimum IrDA pulse width is calculated by a shift right operation of
PMW bit 7-0 by one bit divided by the module clock f_ASC.
Note: If IRPW is cleared (fixed IrDA pulse width), PW_VALUE must be a value which
assures that t_IPW > t_{IPW min}.
Table 18-2 gives three examples for typical frequencies of f_ASC.
Table 18-2
f_ASC
20 MHz
50 MHz
66 MHz
IrDA Pulse Width Adaption to 1.627 µs
PMW
33
t_IPW
1.65 µs
Error
-1.1%
81
1.62 µs
-1.0%
107
1.621 µs
-1.0%
t_{IPW min}
0.8 µs
0.8 µs
0.81 µs
18.2.8 RxD/TxD Data Path Selection in Asynchronous Modes
The data paths for the serial input and output data in Asynchronous Mode are affected
by several control bits in the registers CON and ABCON as shown in Figure 18-11. The
Synchronous Mode operation is not affected by these data path selection capabilities.
The input signal from RxD passes an inverter which is controlled by bit RXINV. The
output signal of this inverter is used for the Autobaud Detection and may bypass the logic
in the Echo Mode (controlled by bit ABEM). Further, two multiplexers are in the RxD input
signal path for providing the Loopback Mode capability (controlled by bit LB) and the
IrDA receive pulse inversion capability (controlled by bit RxDI).
Depending on the Asynchronous Mode (controlled by bitfield M), output signal or the
RxD input signal in Echo Mode (controlled by bit ABEM) is switched to the TxD output
via an inverter (controlled by bit TXINV).
User’s Manual
ASC_X, V2.0
18-17
V2.2, 2004-01