XC161 Datasheet, PDF (365/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Serial Data Link Module SDLM
Register ERRSTAT contains error bits. The bits in this register have to be reset by SW.
ERRSTAT
Error Status Register
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
CR
CER
COL
SHO
RTH
SHO
RTL
FOR
MAT
r
rh rh rh rh rh
Field
FORMAT
SHORTL
SHORTH
COL
CRCER
0
Bits Type Description
0
rh Format Error
Bit is set if a frame length error, byte length error,
symbol timing error or bit timing error occurred.
1
rh Bus Shorted Low
This bit is set if the device tries to sent data, but
permanently reads a ‘0’ on the bus.
2
rh Bus Shorted High
This bit is set if a ‘1’ is detected on the bus for more
than one second.
3
rh Collision Detected
This bit is set if a collision has been detected on the
bus.
4
rh CRC Error
This bit is set if the calculated CRC differs from the
received one.
[15:5] –
Reserved; returns ‘0’ if read.
User’s Manual
SDLM_X, V2.0
22-34
V2.2, 2004-01