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XC161 Datasheet, PDF (364/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Serial Data Link Module SDLM
Register BUSSTAT contains bus-related status bits.
BUSSTAT
Bus Status Register
Reset Value: 0000H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
IDLE
END
F
EOD
SOF
r
rh rh rh rh
Field
SOF
EOD
ENDF
IDLE
0
Bits Type Description
0
rh Start Of Frame Detected
Indicates the detection of SOF; bit is reset by
BUSRST.
1
rh End Of Data Detected
Indicates the detection of EOD; bit is reset by
BUSRST.
2
rh End Of Frame Detected
Indicates the detection of EOF; bit is reset by
BUSRST
3
rh Bus Idle
This bit is set after IFS. It is reset by HW if a new
frame has started.
[15:4] –
Reserved; returns ‘0’ if read.
User’s Manual
SDLM_X, V2.0
22-33
V2.2, 2004-01