XC161 Datasheet, PDF (241/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

21
TwinCAN Module
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
21.1
Kernel Description
21.1.1 Overview
The TwinCAN module contains two Full-CAN nodes operating independently or
exchanging data and remote frames via a gateway function. Transmission and reception
of CAN frames is handled in accordance to CAN specification V2.0 part B (active). Each
of the two Full-CAN nodes can receive and transmit standard frames with 11-bit
identifiers as well as extended frames with 29-bit identifiers.
Both CAN nodes share the TwinCAN module’s resources in order to optimize the CAN
bus traffic handling and to minimize the CPU load. The flexible combination of Full-CAN
functionality and FIFO architecture reduces the efforts to fulfill the real-time requirements
of complex embedded control applications. Improved CAN bus monitoring functionality
as well as the increased number of message objects permit precise and comfortable
CAN bus traffic handling.
Depending on the application, each of the 32 message objects can be individually
assigned to one of the two CAN nodes. Gateway functionality allows automatic data
exchange between two separate CAN bus systems, which reduces CPU load and
improves the real time behavior of the entire system.
The bit timings for both CAN nodes are derived from the peripheral clock (f_CAN) and are
programmable up to a data rate of 1 MBaud. A pair of receive and transmit pins connect
each CAN node to a bus transceiver.
Features
• CAN functionality according to CAN specification V2.0 B active.
• Dedicated control registers are provided for each CAN node.
• A data transfer rate up to 1 MBaud is supported.
• Flexible and powerful message transfer control and error handling capabilities are
implemented.
• Full-CAN functionality: 32 message objects can be individually
– assigned to one of the two CAN nodes,
– configured as transmit or receive object,
– participate in a 2, 4, 8, 16 or 32 message buffer with FIFO algorithm,
– setup to handle frames with 11-bit or 29-bit identifiers,
– provided with programmable acceptance mask register for filtering,
– monitored via a frame counter,
– configured to Remote Monitoring Mode.
• Up to eight individually programmable interrupt nodes can be used.
• CAN Analyzer Mode for bus monitoring is implemented.
User’s Manual
TwinCAN_X1, V2.1
21-1
V2.2, 2004-01