XC161 Datasheet, PDF (58/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
The General Purpose Timer Units
Timer Concatenation
Using the toggle bit T6OTL as a clock source for the auxiliary timer in counter mode
concatenates the core timer T6 with the auxiliary timer T5. This concatenation forms
either a 32-bit or a 33-bit timer/counter, depending on which transition of T6OTL is
selected to clock the auxiliary timer.
• 32-bit Timer/Counter: If both a positive and a negative transition of T6OTL are used
to clock the auxiliary timer, this timer is clocked on every overflow/underflow of the
core timer T6. Thus, the two timers form a 32-bit timer.
• 33-bit Timer/Counter: If either a positive or a negative transition of T6OTL is
selected to clock the auxiliary timer, this timer is clocked on every second
overflow/underflow of the core timer T6. This configuration forms a 33-bit timer (16-bit
core timer + T6OTL + 16-bit auxiliary timer).
As long as bit T6OTL is not modified by software, it represents the state of the internal
toggle latch, and can be regarded as part of the 33-bit timer.
The count directions of the two concatenated timers are not required to be the same.
This offers a wide variety of different configurations.
T6, which represents the low-order part of the concatenated timer, can operate in timer
mode, gated timer mode or counter mode in this case.
f_GPT
T6IN
Operating
Mode
Control
BPS2 T6I
Count
Core Timer T6
Toggle Latch
T6IRQ
T6OUT
T6R
Clear Up/Down
T5IN
0
MUX
1
T5I.2
Edge
Select
T5I T5R ^{0 MUX}
T6R ¹
Count
Auxiliary
Timer T5
T5IRQ
Clear Up/Down
T5RC
MCA05409
Figure 14-28 Concatenation of Core Timer T6 and Auxiliary Timer T5
User’s Manual
GPT_X1, V2.0
14-44
V2.2, 2004-01