XC161 Datasheet, PDF (36/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
The General Purpose Timer Units
Timer Concatenation
Using the toggle bit T3OTL as a clock source for an auxiliary timer in counter mode
concatenates the core timer T3 with the respective auxiliary timer. This concatenation
forms either a 32-bit or a 33-bit timer/counter, depending on which transition of T3OTL
is selected to clock the auxiliary timer.
• 32-bit Timer/Counter: If both a positive and a negative transition of T3OTL are used
to clock the auxiliary timer, this timer is clocked on every overflow/underflow of the
core timer T3. Thus, the two timers form a 32-bit timer.
• 33-bit Timer/Counter: If either a positive or a negative transition of T3OTL is
selected to clock the auxiliary timer, this timer is clocked on every second
overflow/underflow of the core timer T3. This configuration forms a 33-bit timer (16-bit
core timer + T3OTL + 16-bit auxiliary timer).
As long as bit T3OTL is not modified by software, it represents the state of the internal
toggle latch, and can be regarded as part of the 33-bit timer.
The count directions of the two concatenated timers are not required to be the same.
This offers a wide variety of different configurations.
T3, which represents the low-order part of the concatenated timer, can operate in timer
mode, gated timer mode or counter mode in this case.
f_GPT
T3IN
Operating
Mode
Control
BPS1 TxI
Count
Core Timer T3
Toggle Latch
T3IRQ
T3OUT
T3R
Up/Down
TxIN
0
MUX
1
TxI.2
Edge
Select
TxI TxR ^{0 MUX}
T3R ¹
Count
Auxiliary
Timer Tx
Up/Down
TxIRQ
TxRC
x = 2, 4
MCA05399
Figure 14-15 Concatenation of Core Timer T3 and an Auxiliary Timer
User’s Manual
GPT_X1, V2.0
14-22
V2.2, 2004-01