XC161 Datasheet, PDF (412/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Keyword Index
C
Calibration 16-17 [2]
CAN
acceptance filtering 21-16 [2]
analysing mode 21-7 [2]
arbitration 21-16 [2]
baudrate 21-56 [2]
bit timing 21-9 [2], 21-56 [2]
bus off
recovery sequence 21-4 [2]
status bit 21-51 [2]
CAN siehe TwinCAN 21-1 [2]
error counters 21-55 [2]
error handling 21-11 [2]
error warning level 21-55 [2]
frame counter/time stamp 21-55 [2],
21-58 [2]
Interface 2-25 [1]
single data transfer 21-23 [2]
CAPCOM12 2-16 [1]
Capture Mode 17-13 [2]
Counter Mode 17-8 [2]
CAPREL 14-53 [2]
Capture Mode
GPT1 14-26 [2]
GPT2 (CAPREL) 14-45 [2]
Capture/Compare Registers 17-10 [2]
CC1_DRM, CC2_DRM 17-23 [2]
CC1_IOC, CC2_IOC 17-29 [2]
CC1_M0-3 17-10 [2]
CC1_OUT, CC2_OUT 17-25 [2]
CC1_SEE, CC2_SEE 17-28 [2]
CC1_SEM, CC2_SEM 17-27 [2]
CC1_T01CON 17-5 [2]
CC1_T0IC 17-9 [2]
CC1_T1IC 17-9 [2]
CC2_M4-7 17-11 [2]
CC2_T78CON 17-5 [2]
CC2_T7IC 17-9 [2]
CC2_T8IC 17-9 [2]
CCxIC 17-34 [2]
Chip Select
Configuration 6-19 [1]
Clock
generation 2-29 [1]
generator modes 6-18 [1]
output signal 6-39 [1]
Command sequences
(Flash) 3-19 [1]
Concatenation of Timers 14-22 [2],
14-44 [2]
Configuration
Address 6-19 [1]
Bus Mode 6-20 [1]
Chip Select 6-19 [1]
default 6-23 [1]
PLL 6-18 [1]
Reset 6-14 [1]
Reset Output 6-22 [1]
special modes 6-21 [1]
Write Control 6-20 [1]
Context
Pointer Updating 4-34 [1]
Switch 4-33 [1]
Switching 5-32 [1]
Conversion
analog/digital 16-1 [2]
Arbitration 16-16 [2]
Auto Scan 16-12 [2]
timing control 16-18 [2]
Count direction 14-6 [2], 14-34 [2]
Counter 14-20 [2], 14-42 [2]
Counter Mode (GPT1) 14-10 [2], 14-38 [2]
CP 4-36 [1]
CPU 2-2 [1], 4-1 [1]
CPUCON1 4-26 [1]
CPUCON2 4-27 [1]
CRIC 14-54 [2]
CSP 4-38 [1]
D
Data Management Unit (Introduction)
2-9 [1]
Data Page 4-42 [1]
boundaries 3-15 [1]
User’s Manual
i-2
V2.2, 2004-01