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XC161 Datasheet, PDF (270/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
• When bit IDC<s> is set, the identifier of the source message object is copied to the
destination message object. Otherwise, the identifier of the destination message
object is not modified.
• If DLCC<s> is set, the data length code of the source message is copied to the
destination object.
• Bit GDFS<s> decides, whether the transmit request flag on the destination side is set
(TXRQ<d> = ‘10’ if GDFS<s> = ‘1’) after finishing the data copy process. An automatic
transmission of the copied data frame on the destination side takes place, if control
bit CPUUPD<d> is reset to ‘01’.
The destination message object, addressed by CANPTR<s>, has to be configured for
transmit operation (DIR = 1). Depending on the required functionality, the destination
message object can be set up in three different operating modes:
• With MMC<d> = ‘000’, the destination message object is declared as standard
message object. In this case, data frames, received on the source side, can be
automatically emitted on the destination side if enabled by the respective control bits
CPUUPD<d> and GDFS<s>. Remote frames, received on the destination side, are not
transferred to the source side, but can be directly answered by the destination
message object if CPUUPD<d> is reset to ‘01’.
• With MMC<d> = ‘100’, the destination message object is declared as normal mode
gateway for incoming (remote) frames. Data frames, received on the source side, can
be automatically emitted on the destination side if enabled (CPUUPD<d>, GDFS<s>)
and remote frames, received on the destination side, are transmitted on the source
side if enabled by SRREN<d> = ‘1’.
• With MMC<d> = ‘01x’, the destination message object is set up as an element of a
FIFO buffering the data frames transferred from the source side through the gateway.
Remote frames, received on the destination side, are not transferred to the source
side, but can be directly answered by the currently addressed FIFO element if
CPUUPD<d> is reset (bits SRREN<d> have to be cleared).
• Remote frame handling is completely done on the destination side according to FIFO
rules.
User’s Manual
TwinCAN_X1, V2.1
21-30
V2.2, 2004-01