XC161 Datasheet, PDF (414/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

H
Hardware
Traps 5-43 [1]
I
I2C 20-1 [2]
IDX0, IDX1 4-47 [1]
IIC 20-1 [2]
Programming 20-16 [2]
Register Overview 20-12 [2]
IIC Interface 2-26 [1]
IIC_ADR 20-9 [2]
IIC_CFG 20-10 [2]
IIC_CON 20-5 [2]
IIC_DIC 20-18 [2]
IIC_PEIC 20-18 [2]
IIC_RTBH 20-11 [2]
IIC_RTBL 20-11 [2]
IIC_ST 20-7 [2]
IMB
block diagram 3-37 [1]
control functions 3-41 [1]
memories
address map 3-38 [1]
wait states 3-41 [1]
IMBCTR 3-41 [1]
Incremental Interface Mode (GPT1)
14-11 [2]
Indication of reset source 6-46 [1]
Instruction 12-1 [1]
Bit Manipulation 12-2 [1]
Pipeline 4-11 [1]
protected 12-6 [1]
Interface
ASC 18-1 [2]
CAN 2-25 [1]
External Bus 9-1 [1]
IIC 2-26 [1], 20-1 [2]
J1850 2-24 [1]
SDLM 22-1 [2]
SSC 19-1 [2]
Interrupt
User’s Manual
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Keyword Index
Arbitration 5-4 [1]
during sleep mode 5-39 [1]
Enable/Disable 5-29 [1]
External 5-35 [1]
Fast external 5-37 [1]
input timing 5-40 [1]
Jump Table Cache 5-16 [1]
Latency 5-41 [1]
Node Sharing 5-34 [1]
Priority 5-7 [1]
Processing 5-1 [1]
RTC 15-12 [2]
source control 5-37 [1]
Sources 5-12 [1]
System 2-8 [1], 5-2 [1]
Vectors 5-12 [1]
Interrupt Handling
CAN transfer 21-6 [2]
SDLM 22-9 [2], 22-52 [2]
IP 4-38 [1]
IrDA Frames ASC 18-8 [2]
J
J1850 22-1 [2]
J1850 Interface (->SDLM) 2-24 [1]
L
Latency
Interrupt, PEC 5-41 [1]
LXBus 2-13 [1]
M
MAH, MAL 4-69 [1]
MAR 3-26 [1]
Margin check 3-25 [1]
Master mode
IIC Bus 20-12 [2]
MCW 4-66 [1]
MDC 4-64 [1]
MDH 4-63 [1]
MDL 4-64 [1]
Memory 2-10 [1]
Areas (Data) 3-8 [1]
i-4
V2.2, 2004-01