XC161 Datasheet, PDF (236/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
IIC-Bus Module
End-of-Data-Transmission Interrupt, IRQE
This request is activated and the flag is set when the current data transfer is terminated
either by a repeated start, by a stop, or by a missing acknowledge.
In the case of Slave-Transmitter Mode, additionally the Data Transfer interrupt request
IRQD will be activated.
Flag IRQE must be cleared by software.
Protocol Event Interrupt, IRQP
This request is activated and the flag is set in Multi-Master mode when the module has
lost arbitration. Additionally, the arbitration lost flag AL is set.
In Multi-Master and in Slave Mode, this request is activated when either the general call
address or the device’s own address has been received.
Flag IRQP must be cleared by software.
Interrupt Nodes
The three interrupt request lines are connected to two interrupt nodes (see Figure 20-5):
IIC_DIC
IIC Data Interrupt Ctrl. Reg.
ESFR (F186_H/C3_H)
15 14 13 12 11 10 9 8 7 6 5
-
GPX
ICD
IR
ADC
IE
- - - - - - - rw rwh rw
Reset Value: - - 00_H
43210
ILVL
rw
GLVL
rw
IIC_PEIC
IIC Protocol Intr. Ctrl. Reg.
ESFR (F18E_H/C7_H)
Reset Value: - - 00_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-
GPX
ICP
IR
ADE
IE
- - - - - - - rw rwh rw
ILVL
rw
GLVL
rw
Note: Please refer to the general Interrupt Control Register description for an
explanation of the control fields.
User’s Manual
IIC_X, V2.0
20-18
V2.2, 2004-01