English
Language : 

XC161 Datasheet, PDF (33/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
The General Purpose Timer Units
Timers T2 and T4 in Gated Timer Mode
Gated timer mode for an auxiliary timer Tx is selected by setting bitfield TxM in register
TxCON to 010B or 011B. Bit TxM.0 (TxCON.3) selects the active level of the gate input.
Note: A transition of the gate signal at line TxIN does not cause an interrupt request.
fGPT
TxIN
Prescaler
Gate fTx
Ctrl.
BPS1
TxI
TxM
TxR 0 MUX
T3R 1
Count
Auxiliary
Timer Tx
TxIRQ
TxEUD
TxUD
TxRC
0
MUX Up/Down
=1
1
TxUDE
x = 2, 4
MCB05396
Figure 14-12 Block Diagram of an Auxiliary Timer in Gated Timer Mode
Note: There is no output toggle latch for T2 and T4.
Start/stop of an auxiliary timer can be controlled locally or remotely.
User’s Manual
GPT_X1, V2.0
14-19
V2.2, 2004-01