XC161 Datasheet, PDF (136/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Units
Non-Staggered Mode
To gain maximum speed and resolution with the CAPCOM unit, it can be switched to
non-staggered mode. In this mode, one CAPCOM operation cycle is equal to one
module clock cycle. Timer increment and the comparison of its new contents with the
contents of the compare register takes place within one clock cycle. The appropriate
output signals are switched in the following clock cycle (in parallel to the next possible
timer increment and comparison).
Figure 17-13 illustrates the non-staggered mode. Note that when the timer overflows, it
also takes one additional clock cycle to switch the output signals.
Note: In non-staggered mode, direct port latch switching is disabled.
User’s Manual
CC12_X1, V2.1
17-32
V2.2, 2004-01