XC161 Datasheet, PDF (350/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Serial Data Link Module SDLM
Transmission in Block Mode
Block mode is selected by BMEN = 1 in register GLOBCON. In block mode, FIFO access
is automatically enabled (not dependent on RxINCE or TxINCE). The transmit buffer in
block mode is 8 bytes long.
Start
end
MSGTRA=1 ?
n
y
more bytes ?
y
n
write TxD0
BREAK=1 ?
y
n
stop
transmission
BRKRST:=1
error handling
Bit MSGTRA=1 indicates that
a complete byte has been
sent on the bus, that the
transmission of the last byte is
in progress and that the
module waits for a new byte.
If no more bytes are written to
TxD0, the SDLM will
terminate the transmission
with an EOD symbol. This
write action automatically
resets bit MSGTRA.
Bit BREAK=1 indicates that a
break symbol has been
received. This terminates the
message and optionally block
mode, too.
The SW has to check what
kind of error has been
detected to run an appropriate
servive routine.
Figure 22-13 Transmission in Block Mode
User’s Manual
SDLM_X, V2.0
22-19
V2.2, 2004-01