XC161 Datasheet, PDF (295/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
Field
LETD
LEINC
Bits
8
High
9
High
Type Description
rh Last Error Transfer Direction
0 The last error occurred while the corresponding
CAN node was receiving a message (REC has
been incremented).
1 The last error occurred while the corresponding
CAN node was transmitting a message (TEC
has been incremented).
An error during message reception is indicated without
regarding the result of the acceptance filtering.
rh Last Error Increment
0 The error counter was incremented by 1 due to
the error reported by LETD.
1 The error counter was incremented by 8 due to
the error reported by LETD.
0
[15:10] –
Reserved; returns ‘0’ if read; should be written with ‘0’.
High
Note: Modifying the contents of register AECNT/BECNT requires bit CCE = ‘1’ in register
ACR/BCR.
User’s Manual
TwinCAN_X1, V2.1
21-55
V2.2, 2004-01