XC161 Datasheet, PDF (162/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Asynchronous/Synchronous Serial Interface (ASC)
18.3
Synchronous Operation
Synchronous Mode supports half-duplex communication, basically for simple I/O
expansion via shift registers. Data is transmitted and received via line RxD while line TxD
outputs the shift clock.
Synchronous Mode is selected with bitfield M = 000_B.
Eight data bits are transmitted or received synchronous to a shift clock generated by the
internal baudrate generator. The shift clock is active only as long as data bits are
transmitted or received.
13-bit Reload Register
f_ASC
R
2
3
MUX
f_DIV
13-bit Baudrate Timer
f_BRT
4 ^fBR
BRS
M = 000_B
OE
REN
Shift Clock
RIR _{Receive Int.}
Request
TIR
Transmit Int.
OEN
LB
Serial Port Control
Request
TBIR _{Transmit Buffer}
TxD
FIFO
Shift Clock Control
Int. Request
EIR
Error Int.
Request
RxD
0
MUX
1
Receive Shift
Register
Transmit Shift
Register
Receive FIFO Reg.
RBUF
Transmit FIFO Reg.
TBUF
Internal Bus
Figure 18-12 Synchronous Mode of Serial Channel ASC
MCA05443
User’s Manual
ASC_X, V2.0
18-19
V2.2, 2004-01