XC161 Datasheet, PDF (109/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Units
CC1_T01CON
Timer 0/1 Control Register
SFR (FF50_H/A8_H)
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- T1R
-
T1M
T1I
- rw
-
rw
rw
- T0R
-
T0M
T0I
- rw
-
rw
rw
CC2_T78CON
Timer 7/8 Control Register
SFR (FF20_H/90_H)
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- T8R
-
T8M
T8I
- rw
-
rw
rw
- T7R
-
T7M
T7I
- rw
-
rw
rw
Field
Bits Type Description
TxR
14, 6 rw
Timer/Counter Tx Run Control
0 Timer/Counter Tx is disabled
1 Timer/Counter Tx is enabled
TxM
11, 3 rw
Timer/Counter Tx Mode Selection
0 Timer Mode
1 Counter Mode
TxI
[10:8], rw
Timer/Counter Tx Input Selection
[2:0]
Timer Mode (TxM = 0):
Input frequency f_Tx = f_CC/2^(<TxI>+3) or f_CC/2^(<TxI>),
depending on (non-)staggered mode, see
Table 17-1
Counter Mode (TxM = 1):
000 Overflow/Underflow of GPT Timer T6
001 Positive (rising) edge on pin TxIN
010 Negative (falling) edge on pin TxIN
011 Any edge (rising and falling) on pin TxIN
1XX Reserved. Do not use this combination!
Note: For timers T1 and T8 the only option in counter
mode is 000_B. T1 and T8 stop in other cases.
The timer run flags TxR allow the starting and stopping of the timers. The following
description of the timer modes and operation always applies to the enabled state of the
timers, i.e. the respective run flag is assumed to be set.
User’s Manual
CC12_X1, V2.1
17-5
V2.2, 2004-01