XC161 Datasheet, PDF (22/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

14.1.2
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
The General Purpose Timer Units
GPT1 Core Timer T3 Operating Modes
Timer 3 in Timer Mode
Timer mode for the core timer T3 is selected by setting bitfield T3M in register T3CON
to 000_B. In timer mode, T3 is clocked with the module’s input clock f_GPT divided by two
programmable prescalers controlled by bitfields BPS1 and T3I in register T3CON.
Please see Section 14.1.5 for details on the input clock options.
f_GPT
Prescaler
BPS1 T3I
T3UD
T3EUD
T3IRQ
f_T3
Count _{Core Timer T3}
Toggle Latch
T3OUT
to
T3R
T2/T4
0
MUX _Up/Down
=1
1
T3UDE
MCB05391
Figure 14-4 Block Diagram of Core Timer T3 in Timer Mode
User’s Manual
GPT_X1, V2.0
14-8
V2.2, 2004-01