XC161 Datasheet, PDF (20/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
The General Purpose Timer Units
Timer T3 Run Control
The core timer T3 can be started or stopped by software through bit T3R (Timer T3 Run
Bit). This bit is relevant in all operating modes of T3. Setting bit T3R will start the timer,
clearing bit T3R stops the timer.
In gated timer mode, the timer will only run if T3R = 1 and the gate is active (high or low,
as programmed).
Note: When bit T2RC or T4RC in timer control register T2CON or T4CON is set, bit T3R
will also control (start and stop) the auxiliary timer(s) T2 and/or T4.
Count Direction Control
The count direction of the GPT1 timers (core timer and auxiliary timers) can be controlled
either by software or by the external input pin TxEUD (Timer Tx External Up/Down
Control Input). These options are selected by bits TxUD and TxUDE in the respective
control register TxCON. When the up/down control is provided by software (bit
TxUDE = 0), the count direction can be altered by setting or clearing bit TxUD. When bit
TxUDE = 1, pin TxEUD is selected to be the controlling source of the count direction.
However, bit TxUD can still be used to reverse the actual count direction, as shown in
Table 14-1. The count direction can be changed regardless of whether or not the timer
is running.
Note: When pin TxEUD is used as external count direction control input, it must be
configured as input (its corresponding direction control bit must be cleared).
Table 14-1
Pin TxEUD
X
X
0
1
0
1
GPT1 Timer Count Direction Control
Bit TxUDE Bit TxUD
Count Direction
0
0
Count Up
0
1
Count Down
1
0
Count Up
1
0
Count Down
1
1
Count Down
1
1
Count Up
Bit TxRDIR
0
1
0
1
1
0
User’s Manual
GPT_X1, V2.0
14-6
V2.2, 2004-01