XC161 Datasheet, PDF (201/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
High-Speed Synchronous Serial Interface (SSC)
19
High-Speed Synchronous Serial Interface (SSC)
The XC161 contains two High-Speed Synchronous Serial Interfaces, SSC0 and SSC1.
The following sections present the general features and operations of such an SSC
module. The final section describes the actual implementation of the two SSC modules
including their interconnections with other on-chip modules.
19.1
Introduction
The High-Speed Synchronous Serial Interface (SSC) supports both full-duplex and half-
duplex serial synchronous communication up to 20 Mbit/s (@ 40 MHz module clock).
The serial clock signal can be generated by the SSC itself (Master Mode) or can be
received from an external master (Slave Mode). Data width, shift direction, clock polarity,
and phase are programmable. This supports communication with SPI-compatible
devices. Transmission and reception of data is double-buffered. A 16-bit baudrate
generator provides the SSC with a separate serial clock signal.
Features and Functions
• Master and Slave Mode operation
– Full-duplex or half-duplex operation
• Flexible data format
– Programmable number of data bits: 2 to 16 bits
– Programmable shift direction: LSB or MSB shift first
– Programmable clock polarity: idle low or high state for the shift clock
– Programmable clock/data phase:
data shift with leading or trailing edge of the shift clock
• Baudrate generation from 20 Mbit/s to 306.6 bit/s (@ 40 MHz module clock)
• Interrupt generation
– On a Transmitter-Empty condition
– On a Receiver-Full condition
– On an Error condition (receive, phase, baudrate, transmit error)
19.2
Operational Overview
The high-speed synchronous serial interface can be configured in a very flexible way, so
it can be used with other synchronous serial interfaces, can serve for master/slave or
multimaster interconnections or can operate compatible with the popular SPI interface.
Thus, the SSC can be used to communicate with shift registers (IO expansion),
peripherals (e.g. EEPROMs, etc.) or other controllers (networking). The SSC supports
half-duplex and full-duplex communication. Data is transmitted on lines MTX/STX or
received on lines MRX/SRX, connected with pins MTSR (Master Transmit/Slave
Receive) and MRST (Master Receive/Slave Transmit). The clock signal is output via line
User’s Manual
SSC_X, V2.0
19-1
V2.2, 2004-01