XC161 Datasheet, PDF (385/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Serial Data Link Module SDLM
22.6.2.1 System Registers
Register PISEL allows the user to select an input pin for the SDLM receive signal.
Furthermore, the interrupt functionality of SDLM_I1 is defined.
SDLM_PISEL
SDLM Port Input Select Register
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
I1
SEL
RIS
r
rw
rw
Field
RIS
I1SEL
0
Bits
[1:0]
2
[15:3]
Type
rw
rw
r
Description
Receive Input Selection
Bitfield RIS defines the input pin for the SDLM receive
line RxDJ.
00 The input pin for RxDJ is P4.6.
01 The input pin for RxDJ is P4.4.
10 The input pin for RxDJ is P9.3.
11 The input pin for RxDJ is P7.7.
Interrupt SDLM_I1 Selection
Bit I1SEL defines the interrupt functionality of the
SDLM_I1 interrupt.
0 The interrupt signal SDLM_I1 is combined (logical
OR) with the signal SDLM_I0. The combined
signal sets the interrupt request flag in the SDLM
interrupt control register. The interrupt node
CAN_7 of the TwinCAN module is not influenced
by the SDLM module.
1 The interrupt signal SDLM_I0 is the only source to
trigger the interrupt request flag in the SDLM
interrupt control register. The interrupt signal
SDLM_I1 is combined (logical OR) with the
interrupt signal CAN_7 delivered by the TwinCAN
module. The combined signal sets the interrupt
request flag of the interrupt node CAN_7.
Reserved; returns ‘0’ if read; should be written with ‘0’.
Note: In order to avoid mismatches if bit I1SEL = ‘1’, the interrupt node pointers of the
TwinCAN module should not be programmed with the value ‘111_B’.
User’s Manual
SDLM_X, V2.0
22-54
V2.2, 2004-01