XC161 Datasheet, PDF (231/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
IIC-Bus Module
It is not only necessary for the loosing master to release the bus in order to allow the
other master to control the bus, but it also needs to receive the message from the other
master, as it might be addressed as a slave.
When the XC161 wants to use the IIC-Bus, it prepares to start a transfer as in Single-
Master Mode. The next recommended step is to poll bit BB to check whether the bus is
busy. If BB = 0, then the start condition can be generated by setting bit BUM. If the bus
is still free after that, operation continues as in Single-Master Mode. If the bus is already
in use, indicated by BB = 1, the master can not take control of the bus and needs to act
as a slave (acting as a slave is automatically done in hardware); bit BUM should not be
set in this case. If bit BUM is set although the bus is already in use, the Arbitration Lost
flag AL is set.
However, if testing bit BB showed that the bus is free, and software sets the BUM bit, but
at the same time another master tries to get onto the bus, the bus arbitration needs to
take place. This is performed such that the master which first detects a mismatch
between its intended output level and the actual level on the SDA line looses the
arbitration. The Arbitration Lost flag AL is set in this case, the Transmit Selection bit TRX
is cleared to 0 (= reception), and the master automatically switches to slave mode to
receive the address information. At the end of the address phase, hardware
automatically compares the received address with the own station address stored in
register ADR. If the two addresses match or if the general call address (00_H) has been
received, the Slave Select flag SLA in register ST is set to indicate that the device has
been contacted. Operation is then continued as described in Slave Mode.
Together with bit AL, the Protocol Event interrupt flag IRQP is set, and the respective
interrupt request line is activated.
Note that a master which has lost arbitration has written its transmit message to the
receive/transmit buffer before it has tried to take control of the IIC-Bus. However, after it
has lost arbitration, it has switched to Slave Mode, and was therefore receiving the
message sent over the bus. This message is then stored in the receive/transmit buffer,
overwriting the previous transmit message.
Due to the fact that a master must also act as a slave in a multi-master system, the actual
implicit default operating mode in Multi-Master Mode is Slave Mode.
20.3.3 Operation in Slave Mode
When the XC161 is intended to purely operate as a slave on the IIC-Bus, Slave Mode
needs to be selected via bitfield MOD in register CON.
The IIC-Bus Module is selected by another master when it receives either its own device
address or the general call address during the address phase of a transmission (the
byte(s) following a start or repeated start condition). If this is the case, bit SLA in register
ST is set, the Protocol Event interrupt flag IRQP is set, and the respective interrupt
request line is activated.
User’s Manual
IIC_X, V2.0
20-13
V2.2, 2004-01