XC161 Datasheet, PDF (226/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

Field
LRB
SLA
AL
ADR
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
IIC-Bus Module
Bits Type Description
3
rh
Last Received Bit
Bit LRB represents the last bit (i.e. the acknowledge
bit) of the last transferred byte. It is automatically
cleared by a read/write access to the buffer
RTB0 … 3.
Note: If LRB is high (no acknowledge) in slave mode,
bit TRX is set automatically to select slave
transmit mode.
2
rh
Slave Select Flag
0 The IIC-Bus Module is not addressed in Slave
mode, or the module is in Master mode.
1 The IIC-Bus Module has been addressed as a
slave (own slave address or general address,
00_H, was received).
1
rwh Arbitration Lost Flag
Bit AL is set when the IIC-Bus Module has tried to
become master on the bus but has lost arbitration.
Operation is continued until the 9^th clock pulse.
If multi-master mode is selected, the IIC module
temporarily switches to Slave mode after a lost
arbitration. Bit IRQP is set along with bit AL.
AL must be cleared via software.
0
rh
Address Phase Flag
Bit ADR is set after a start condition in Slave mode
until the complete address has been received (1 byte
in 7-bit address mode, 2 bytes in 10-bit address
mode).
User’s Manual
IIC_X, V2.0
20-8
V2.2, 2004-01