XC161 Datasheet, PDF (61/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
The General Purpose Timer Units
incremental interface mode, in order to derive dynamic information (speed, acceleration)
from the input signals.
For capture mode operation, the selected pins CAPIN, T3IN, or T3EUD must be
configured as input. To ensure that a transition of a trigger input signal applied to one of
these inputs is recognized correctly, its level must be held high or low for a minimum
number of module clock cycles, detailed in Section 14.2.6.
GPT2 Capture/Reload Register CAPREL in Reload Mode
Reload mode for register CAPREL is selected by setting bit T6SR in control register
T6CON. In reload mode, the core timer T6 is reloaded with the contents of register
CAPREL, triggered by an overflow or underflow of T6. This will not activate the interrupt
request line CRIRQ associated with the CAPREL register. However, interrupt request
line T6IRQ will be activated, indicating the overflow/underflow of T6.
CAPREL
Register
Reload
Count
Clock
T6SR
Core Timer T6
Toggle Latch
Up/Down
Figure 14-30 GPT2 Register CAPREL in Reload Mode
T6IRQ
T6OUT
T6OUF
to T5
MCA05411
User’s Manual
GPT_X1, V2.0
14-47
V2.2, 2004-01