XC161 Datasheet, PDF (390/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Serial Data Link Module SDLM
Table 22-3 shows the required register setting to configure the IO lines of the SDLM
module for operation.
Table 22-3 SDLM IO Selection and Setup
Port Lines
Alternate Select
Registers
Port Input Select Direction
Register
Control
Register
P4.4 / RxDJ –
SDLM_PISEL[1:0] DP4.P4 = 0
= 01
P4.6 / RxDJ –
SDLM_PISEL[1:0] DP4.P6 = 0
= 00
P4.7 / TxDJ
ALTSEL0P4.P7 = 0 –
and
ALTSEL1P4.P7 = 1
DP4.P7 = 1
P7.6 / TxDJ ALTSEL0P7.P6 = 1 –
DP7.P6 = 1
P7.7 / RxDJ –
SDLM_PISEL[1:0] DP7.P7 = 0
= 11
P9.2 / TxDJ
ALTSEL0P9.P2 = 1 –
and
ALTSEL1P9.P2 = 1
DP9.P2 = 1
P9.3 / RxDJ –
SDLM_PISEL[1:0] DP9.P3 = 0
= 10
IO
Input
Input
Output
Output
Input
Output
Input
User’s Manual
SDLM_X, V2.0
22-59
V2.2, 2004-01