XC161 Datasheet, PDF (112/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Units
Counter Mode
In Counter Mode (TxM = 1), the input clock of a CAPCOM timer is either derived from an
associated external input pin, T0IN/T7IN, or from the over-/underflows of GPT timer T6.
Using an external signal connected to pin TxIN as a counting signal is only possible for
timers T0 and T7. The only counter option for timers T1 and T8 is using the over-
/underflows of the GPT timer T6 (selected by TxI = 000_B).
Bitfields T0I/T7I are used to select either a positive, a negative, or both a positive and a
negative transition of the external signal at pin T0IN/T7IN to trigger an increment of timer
T0/T7. Please note that certain criteria must be met for the external signal and the port
pin programming for this mode in order to operate properly. These conditions are
detailed in Chapter 17.10.
Timer Overflow and Reload
When a CAPCOM timer contains the value FFFF_H at the time a new count trigger occurs,
a timer interrupt request is generated, and the timer is loaded with the contents of its
associated reload register TxREL. The timer then resumes incrementing with the next
count trigger starting from the reloaded value.
The reload registers TxREL are not bitaddressable. After reset, they contain the value
0000_H.
User’s Manual
CC12_X1, V2.1
17-8
V2.2, 2004-01