XC161 Datasheet, PDF (147/419 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core Volume 2 (of 2): Peripheral Units

XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Asynchronous/Synchronous Serial Interface (ASC)
Testing is supported by a loop-back option. A 13-bit baudrate timer with a versatile input
clock divider circuitry provides the serial clock signal. In a Special Asynchronous Mode,
the ASC supports IrDA data transmission up to 115.2 kbit/s with fixed or programmable
IrDA pulse width. Autobaud Detection allows to detect asynchronous data frames with
its baudrate and mode with automatic initialization of the baudrate generator and the
mode control bits.
A transmission is started by writing to the transmit buffer register TBUF. The selected
operating mode determines the number of data bits that will actually be transmitted, so
that, bits written to positions 9 through 15 of register TBUF are always insignificant. Data
transmission is double-buffered, so a new character may be written to the transmit buffer
register before the transmission of the previous character is complete. This allows the
transmission of characters back-to-back without gaps.
Data reception is enabled by the Receiver Enable Bit REN. After reception of a character
has been completed, the received data can be read from the (read-only) receive buffer
register RBUF; the received parity bit can also be read if provided by the selected
operating mode. Bits in the upper half of RBUF that are not valid in the selected operating
mode will be read as zeros.
Data reception is double-buffered, so that reception of a second character may already
begin before the previously received character has been read out of the receive buffer
register. In all modes, receive overrun error detection can be selected through bit OEN.
When enabled, the overrun error status flag OE and the error interrupt request line EIR
will be activated when the receive buffer register has not been read by the time reception
of a ninth character is complete. The previously received character in the receive buffer
is overwritten.
The Loopback Mode (selected by bit LB) allows the data currently being transmitted to
be received simultaneously in the receive buffer. This may be used to test serial
communication routines at an early stage without having to provide an external network.
Note: In Loopback Mode, the alternate input/output functions of the associated port pins
are not necessary.
Note: Serial data transmission or reception is only possible when the Baudrate
Generator Run bit R is set. Otherwise, the serial interface is idle.
Note: Do not program the Mode Control bitfield M to one of the reserved combinations
to avoid unpredictable behavior of the serial interface.
The operating mode of the serial channel ASC is controlled by its control register
ASCx_CON. This register contains control bits for mode and error check selection, and
status flags for error identification.
User’s Manual
ASC_X, V2.0
18-4
V2.2, 2004-01