LM3S9B81 Datasheet, PDF (993/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
OTG A /
Host
Register 325: USB VBUS Droop Control (USBVDC), offset 0x430
This 32-bit register enables a controlled masking of VBUS to compensate for any in-rush current
by a Device that is connected to the Host controller. The in-rush current can cause VBUS to droop,
causing the USB controller's behavior to be unexpected. The USB Host controller allows VBUS to
fall lower than the VBUS Valid level (4.5 V) but not below AValid (2.0 V) for 65 microseconds without
signaling a VBUSERR interrupt in the controller. Without this, any glitch on VBUS would force the
USB Host controller to remove power from VBUS and then re-enumerate the Device.
USB VBUS Droop Control (USBVDC)
Base 0x4005.0000
Offset 0x430
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
VBDEN
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
VBDEN
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W
0
VBUS Droop Enable
Value Description
0 No effect.
1 Any changes from VBUSVALID are masked when VBUS goes
below 4.5 V but not lower than 2.0 V for 65 microseconds.
During this time, the VBUS state indicates VBUSVALID.
June 29, 2010
993
Texas Instruments-Advance Information