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LM3S9B81 Datasheet, PDF (1022/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller
Signal Tables
Table 23-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
35
PA7
I/O
TTL
GPIO port A bit 7.
CAN0Tx
O
TTL
CAN module 0 transmit.
CCP3
I/O
TTL
Capture/Compare/PWM 3.
CCP4
I2C1SDA
I/O
TTL
Capture/Compare/PWM 4.
I/O
OD
I2C module 1 data.
U1DCD
I
TTL
UART module 1 Data Carrier Detect modem status input signal.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
36
PG7
I/O
TTL
GPIO port G bit 7.
CCP5
I/O
TTL
Capture/Compare/PWM 5.
EPI0S31
I/O
TTL
EPI module 0 signal 31.
37
RXIN
I
Analog RXIN of the Ethernet PHY.
38
VDDC
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
39
CCP0
I/O
TTL
Capture/Compare/PWM 0.
EPI0S18
I/O
TTL
EPI module 0 signal 18.
PJ2
I/O
TTL
GPIO port J bit 2.
40
RXIP
I
Analog RXIP of the Ethernet PHY.
41
PF5
I/O
TTL
GPIO port F bit 5.
C1o
O
TTL
Analog comparator 1 output.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
EPI0S15
I/O
TTL
EPI module 0 signal 15.
SSI1Tx
O
TTL
SSI module 1 transmit.
42
PF4
I/O
TTL
GPIO port F bit 4.
C0o
O
TTL
Analog comparator 0 output.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
EPI0S12
I/O
TTL
EPI module 0 signal 12.
SSI1Rx
I
TTL
SSI module 1 receive.
43
TXOP
O
TTL
TXOP of the Ethernet PHY.
44
VDD
-
Power Positive supply for I/O and some logic.
45
GND
-
Power Ground reference for logic and I/O pins.
46
TXON
O
TTL
TXON of the Ethernet PHY.
47
PF0
I/O
TTL
GPIO port F bit 0.
CAN1Rx
I2S0TXSD
I
TTL
CAN module 1 receive.
I/O
TTL
I2S module 0 transmit data.
U1DSR
I
TTL
UART module 1 Data Set Ready modem output control line.
48
OSC0
I
Analog Main oscillator crystal input or an external clock reference input.
49
OSC1
O
Analog Main oscillator crystal output. Leave unconnected when using a
single-ended clock source.
1022
Texas Instruments-Advance Information
June 29, 2010