LM3S9B81 Datasheet, PDF (99/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
6.2.2.2
6.2.2.3
in the Boot Configuration (BOOTCFG) register. If the ROM boot loader is not selected, code in
the ROM checks address 0x000.0004 to see if the Flash memory has a valid reset vector. If the
data at address 0x0000.0004 is 0xFFFF.FFFF, then it is assumed that the Flash memory has not
yet been programmed, and the core executes the ROM Boot Loader.
For example, if the BOOTCFG register is written and committed with the value of 0x0000.3C01,
then PB7 is examined at reset to determine if the ROM boot loader should be executed. If PB7 is
Low, the core unconditionally begins executing the ROM boot loader. If PB7 is High, then the
application in Flash memory is executed if the reset vector at location 0x0000.0004 is not
0xFFFF.FFFF. Otherwise, the ROM boot loader is executed.
Power-On Reset (POR)
Note: The power-on reset also resets the JTAG controller. An external reset does not.
The internal Power-On Reset (POR) circuit monitors the power supply voltage (V_DD) and generates
a reset signal to all of the internal logic including JTAG when the power supply ramp reaches a
threshold value (V_TH). The microcontroller must be operating within the specified operating parameters
when the on-chip power-on reset pulse is complete. For applications that require the use of an
external reset signal to hold the microcontroller in reset longer than the internal POR, the RST input
may be used as discussed in “External RST Pin” on page 99.
The Power-On Reset sequence is as follows:
1. The microcontroller waits for internal POR to go inactive.
2. The internal reset is released and the core loads from memory the initial stack pointer, the initial
program counter, and the first instruction designated by the program counter, and then begins
execution.
The internal POR is only active on the initial power-up of the microcontroller. The Power-On Reset
timing is shown in Figure 25-5 on page 1089.
External RST Pin
Note: It is recommended that the trace for the RST signal must be kept as short as possible. Be
sure to place any components connected to the RST signal as close to the microcontroller
as possible.
If the application only uses the internal POR circuit, the RST input must be connected to the power
supply (V_DD) through an optional pull-up resistor (0 to 100K Ω) as shown in Figure 6-1 on page 99.
Figure 6-1. Basic RST Configuration
VDD
Stellaris®
R_PU
RST
R_PU = 0 to 100 kΩ
June 29, 2010
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