LM3S9B81 Datasheet, PDF (817/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
Table 19-4. Ethernet Register Map (continued)
Offset Name
Type
Reset
-
MR17
R/W
0x0002
-
MR27
-
MR29
-
MR30
-
MR31
RO
-
RO
0x0000
R/W
0x0000
R/W
0x00040
Description
See
page
Ethernet PHY Management Register 17 – Mode
Control/Status
855
Ethernet PHY Management Register 27 – Special
Control/Status
857
Ethernet PHY Management Register 29 – Interrupt Status 858
Ethernet PHY Management Register 30 – Interrupt Mask 860
Ethernet PHY Management Register 31 – PHY Special
Control/Status
862
19.6
Ethernet MAC Register Descriptions
The remainder of this section lists and describes the Ethernet MAC registers, in numerical order by
address offset. Also see “MII Management Register Descriptions” on page 842.
June 29, 2010
817
Texas Instruments-Advance Information