LM3S9B81 Datasheet, PDF (662/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Synchronous Serial Interface (SSI)
Bit/Field
0
Name
RORMIS
Type
RO
Reset
0
Description
SSI Receive Overrun Masked Interrupt Status
Value Description
0 An interrupt has not occurred or is masked.
1 An unmasked interrupt was signaled due to the receive FIFO
overflowing.
This bit is cleared when a 1 is written to the RORIC bit in the SSI
Interrupt Clear (SSIICR) register.
662
June 29, 2010
Texas Instruments-Advance Information