LM3S9B81 Datasheet, PDF (497/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
13.1
– ADC module uses burst requests for DMA
Block Diagram
The Stellaris^® microcontroller contains two identical Analog-to-Digital Converter units. These two
modules, ADC0 and ADC1, share the same sixteen analog input channels. Each ADC module
operates independently and can therefore execute different sample sequences, sample any of the
analog input channels at any time, and generate different interrupts and triggers. Figure
13-1 on page 497 shows how the two modules are connected to analog inputs and the system bus.
Figure 13-1. Implementation of Two ADC Blocks
Triggers
Interrupts/
Triggers
Interrupts/
Triggers
ADC 0
ADC 1
Input
Channels
Figure 13-2 on page 497 provides details on the internal configuration of the ADC controls and data
registers.
Figure 13-2. ADC Module Block Diagram
Internal
Voltage Ref
Trigger Events
Comparator
GPIO (PB4)
Timer
SS3
PWM
Comparator
GPIO (PB4)
Timer
SS2
PWM
Comparator
GPIO (PB4)
Timer
SS1
PWM
Control/Status
ADCACTSS
ADCOSTAT
ADCUSTAT
ADCSSPRI
ADCCTL
ADCSPC
Comparator
GPIO (PB4)
Timer
SS0
PWM
SS0 Interrupt
SS1 Interrupt
SS2 Interrupt
SS3 Interrupt
ADCEMUX
ADCPSSI
PWM Trigger
Interrupt Control
ADCIM
ADCRIS
ADCISC
ADCDCISC
Sample
Sequencer 0
ADCSSMUX0
ADCSSCTL0
ADCSSFSTAT0
Sample
Sequencer 1
ADCSSMUX1
ADCSSCTL1
ADCSSFSTAT1
Sample
Sequencer 2
ADCSSMUX2
ADCSSCTL2
ADCSSFSTAT2
Sample
Sequencer 3
ADCSSMUX3
ADCSSCTL3
ADCSSFSTAT3
Analog-to-Digital
Converter
External
Voltage Ref
(VREFA)
Analog Inputs
(AINx)
Hardware Averager
ADCSAC
FIFO Block
ADCSSFIFO0
ADCSSFIFO1
ADCSSFIFO2
ADCSSFIFO3
Digital
Comparator
ADCSSOPn
ADCSSDCn
ADCDCCTLn
ADCDCCMPn
DC Interrupts
June 29, 2010
497
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