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LM3S9B81 Datasheet, PDF (1072/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller
Signal Tables
Table 23-9. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Typea
Description
Power
GND
C4
-
Power Ground reference for logic and I/O pins.
C5
K5
K10
J10
F11
F12
GNDA
A5
-
Power The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
E3
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. When the on-chip LDO is
used to provide power to the logic, the LDO pin must
also be connected to the VDDC pins at the board
level in addition to the decoupling capacitor(s).
VDD
K7
-
Power Positive supply for I/O and some logic.
G12
K8
K9
H10
G10
E10
G11
VDDA
C7
-
Power The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V,
regardless of system implementation.
VDDC
D3
-
Power Positive supply for most of the logic function,
C3
including the processor core and most peripherals.
SSI
SSI0Clk
M4
I/O
TTL
SSI module 0 clock.
SSI0Fss
L4
I/O
TTL
SSI module 0 frame.
SSI0Rx
L5
I
TTL
SSI module 0 receive.
SSI0Tx
M5
O
TTL
SSI module 0 transmit.
SSI1Clk
J11
I/O
TTL
SSI module 1 clock.
B11
B10
SSI1Fss
J12
I/O
TTL
SSI module 1 frame.
F10
A12
SSI1Rx
K4
G3
A4
I
TTL
SSI module 1 receive.
SSI1Tx
H3
O
TTL
SSI module 1 transmit.
K3
B4
1072
Texas Instruments-Advance Information
June 29, 2010