LM3S9B81 Datasheet, PDF (305/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
The offset listed is a hexadecimal increment to the register’s address, relative to that GPIO port’s
base address:
■ GPIO Port A (APB): 0x4000.4000
■ GPIO Port A (AHB): 0x4005.8000
■ GPIO Port B (APB): 0x4000.5000
■ GPIO Port B (AHB): 0x4005.9000
■ GPIO Port C (APB): 0x4000.6000
■ GPIO Port C (AHB): 0x4005.A000
■ GPIO Port D (APB): 0x4000.7000
■ GPIO Port D (AHB): 0x4005.B000
■ GPIO Port E (APB): 0x4002.4000
■ GPIO Port E (AHB): 0x4005.C000
■ GPIO Port F (APB): 0x4002.5000
■ GPIO Port F (AHB): 0x4005.D000
■ GPIO Port G (APB): 0x4002.6000
■ GPIO Port G (AHB): 0x4005.E000
■ GPIO Port H (APB): 0x4002.7000
■ GPIO Port H (AHB): 0x4005.F000
■ GPIO Port J (APB): 0x4003.D000
■ GPIO Port J (AHB): 0x4006.0000
Note that each GPIO module clock must be enabled before the registers can be programmed (see
page 183).
Important: All GPIO pins are configured as GPIOs and tri-stated by default (GPIOAFSEL=0,
GPIODEN=0, GPIOPDR=0, GPIOPUR=0, and GPIOPCTL=0) with the exception of the
pins shown in the table below. A Power-On-Reset (POR) or asserting RST puts the pins
back to their default state.
Table 9-6. GPIO Pins With Non-Zero Reset Values
GPIO Pins
PA[1:0]
PA[5:2]
PB[3:2]
PC[3:0]
Default State
UART0
SSI0
I²C0
JTAG/SWD
GPIOAFSEL GPIODEN GPIOPDR GPIOPUR
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
GPIOPCTL
0x1
0x1
0x1
0x3
Note:
The default register type for the GPIOCR register is RO for all GPIO pins with the exception
of the NMI pin and the four JTAG/SWD pins (PB7 and PC[3:0]). These five pins are
currently the only GPIOs that are protected by the GPIOCR register. Because of this, the
register type for GPIO Port B7 and GPIO Port C[3:0] is R/W.
The default reset value for the GPIOCR register is 0x0000.00FF for all GPIO pins, with the
exception of the NMI pin and the four JTAG/SWD pins (PB7 and PC[3:0]). To ensure that
the JTAG port is not accidentally programmed as a GPIO, these four pins default to
non-committable. To ensure that the NMI pin is not accidentally programmed as the
non-maskable interrupt pin, it defaults to non-committable. Because of this, the default reset
value of GPIOCR for GPIO Port B is 0x0000.007F while the default reset value of GPIOCR
for Port C is 0x0000.00F0.
June 29, 2010
305
Texas Instruments-Advance Information