LM3S9B81 Datasheet, PDF (36/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Revision History
Table 1. Revision History (continued)
Date
February 2010
Revision Description
6790 ■ Added 108-ball BGA package.
■ In "System Control" chapter:
– Clarified functional description for external reset and brown-out reset.
– Clarified Debug Access Port operation after Sleep modes.
– Corrected the reset value of the Run-Mode Clock Configuration 2 (RCC2) register.
■ In "Internal Memory" chapter, clarified wording on Flash memory access errors and added a section
on interrupts to the Flash memory description.
■ In "External Peripheral Interface" chapter:
– Added clarification about byte selects and dual chip selects.
– Added timing diagrams for continuous-read mode (formerly SRAM mode).
– Corrected reset values of EPI Write FIFO Count (EPIWFIFOCNT) and EPI Raw Interrupt
Status (EPIRIS) registers.
■ Added clarification about timer operating modes and added register descriptions for the GPTM
Timer n Prescale Match (GPTMTnPMR) registers.
■ Clarified register descriptions for GPTM Timer A Value (GPTMTAV) and GPTM Timer B Value
(GPTMTBV) registers.
■ Corrected the reset value of the ADC Sample Sequence Result FIFO n (ADCSSFIFOn) registers.
■ Added ADC Sample Phase Control (ADCSPC) register at offset 0x24.
■ Added caution note to the I²C Master Timer Period (I2CMTPR) register description and changed
field width to 7 bits.
■ In the "Controller Area Network" chapter, added clarification about reading from the CAN FIFO
buffer and clarified packet timestamps functional description.
■ In the "Ethernet Controller" chapter:
– Corrected the reset value and the LED1 bit positions of the Ethernet MAC LED Encoding
(MACLED) register.
– Added clarification about the use of the NPR field in the Ethernet MAC Number of Packets
(MACNP) register.
– Corrected reset values for Ethernet PHY Management Register 0 – Control (MR0) and
Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability
(MR5) registers.
■ Added Session Disconnect (DISCON) bit to the USB General Interrupt Status (USBIS) and
USB Interrupt Enable (USBIE) registers.
■ Made these changes to the Operating Characteristics chapter:
– Added storage temperature ratings to "Temperature Characteristics" table
– Added "ESD Absolute Maximum Ratings" table
■ Made these changes to the Electrical Characteristics chapter:
– In "Flash Memory Characteristics" table, corrected Mass erase time
– Added sleep and deep-sleep wake-up times ("Sleep Modes AC Characteristics" table)
– In "Reset Characteristics" table, corrected units for supply voltage (VDD) rise time
– Modified the preliminary current consumption specification for Run mode 1 and Deep-Sleep
mode.
– Added table entry for VDD3ON power consumption to Table 25-8 on page 1084.
■ Added additional DriverLib functions to appendix.
36
June 29, 2010
Texas Instruments-Advance Information