LM3S9B81 Datasheet, PDF (715/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
17.1 Block Diagram
Figure 17-1. I²S Block Diagram
I2S0TXMCLK
SysClk
System
AHB Bus
Interrupts/
DMA
I2S0RXMCLK
Registers
I2SCFG
I2SIC
I2SRIS
I2SMIS
I2SIM
I2STXCFG
Transmit FIFO
8 entry
I2STXFIFO
I2STXFIFOCFG
I2STXLIMIT
I2STXLEV
I2STXISM
BitClk/WdSel
Generation
Serial
Encoder
Transmit FIFO
I2SRXCFG
Receive FIFO
8 entry
I2SRXFIFO
I2SRXFIFOCFG
I2SRXLIMIT
I2SRXLEV
I2SRXISM
BitClk/WdSel
Generation
Serial
Decoder
Receive FIFO
I2S0TXSCK
I2S0TXWS
I2STXSD
I2S0RXSCK
I2S0RXWS
I2SRXSD
17.2
Signal Description
Table 17-1 on page 716 and Table 17-2 on page 716 list the external signals of the I²S module and
describe the function of each. The I²S module signals are alternate functions for some GPIO signals
and default to be GPIO signals at reset. The column in the table below titled "Pin Mux/Pin Assignment"
lists the possible GPIO pin placements for the I²S signals. The AFSEL bit in the GPIO Alternate
Function Select (GPIOAFSEL) register (page 318) should be set to choose the I²S function. The
number in parentheses is the encoding that must be programmed into the PMCn field in the GPIO
Port Control (GPIOPCTL) register (page 336) to assign the I²S signal to the specified GPIO port
pin. For more information on configuring GPIOs, see “General-Purpose Input/Outputs
(GPIOs)” on page 294.
June 29, 2010
715
Texas Instruments-Advance Information