LM3S9B81 Datasheet, PDF (15/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
Table 9-10.
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GPIO Pins With Non-Zero Reset Values .............................................................. 326
GPIO Pins With Non-Zero Reset Values .............................................................. 329
GPIO Pins With Non-Zero Reset Values .............................................................. 336
Signals for External Peripheral Interface (100LQFP) ............................................ 352
Signals for External Peripheral Interface (108BGA) .............................................. 353
EPI SDRAM Signal Connections ......................................................................... 358
Capabilities of Host Bus 8 and Host Bus 16 Modes .............................................. 362
EPI Host-Bus 8 Signal Connections .................................................................... 363
EPI Host-Bus 16 Signal Connections .................................................................. 364
EPI General Purpose Signal Connections ........................................................... 372
External Peripheral Interface (EPI) Register Map ................................................. 378
Available CCP Pins ............................................................................................ 424
Signals for General-Purpose Timers (100LQFP) .................................................. 425
Signals for General-Purpose Timers (108BGA) .................................................... 426
16-Bit Timer With Prescaler Configurations ......................................................... 430
Timers Register Map .......................................................................................... 439
Watchdog Timers Register Map .......................................................................... 474
Signals for ADC (100LQFP) ............................................................................... 498
Signals for ADC (108BGA) ................................................................................. 498
Samples and FIFO Depth of Sequencers ............................................................ 499
Differential Sampling Pairs ................................................................................. 505
ADC Register Map ............................................................................................. 514
Signals for UART (100LQFP) ............................................................................. 575
Signals for UART (108BGA) ............................................................................... 575
Flow Control Mode ............................................................................................. 580
UART Register Map ........................................................................................... 585
Signals for SSI (100LQFP) ................................................................................. 637
Signals for SSI (108BGA) ................................................................................... 637
SSI Register Map .............................................................................................. 648
Signals for I2C (100LQFP) ................................................................................. 678
Signals for I2C (108BGA) ................................................................................... 678
Examples of I²C Master Timer Period versus Speed Mode ................................... 682
Inter-Integrated Circuit (I²C) Interface Register Map ............................................. 691
Write Field Decoding for I2CMCS[3:0] Field ......................................................... 697
Signals for I2S (100LQFP) ................................................................................. 716
Signals for I2S (108BGA) ................................................................................... 716
I²S Transmit FIFO Interface ................................................................................ 719
Crystal Frequency (Values from 3.5795 MHz to 5 MHz) ........................................ 720
Crystal Frequency (Values from 5.12 MHz to 8.192 MHz) ..................................... 720
Crystal Frequency (Values from 10 MHz to 14.3181 MHz) .................................... 721
Crystal Frequency (Values from 16 MHz to 16.384 MHz) ...................................... 721
I²S Receive FIFO Interface ................................................................................. 723
Audio Formats Configuration .............................................................................. 725
Inter-Integrated Circuit Sound (I²S) Interface Register Map ................................... 726
Signals for Controller Area Network (100LQFP) ................................................... 753
Signals for Controller Area Network (108BGA) ..................................................... 753
Message Object Configurations .......................................................................... 759
CAN Protocol Ranges ........................................................................................ 766
June 29, 2010
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