LM3S9B81 Datasheet, PDF (30/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Table of Contents
Register 148: USB Type Endpoint 0 (USBTYPE0), offset 0x10A ............................................................ 944
Register 149: USB NAK Limit (USBNAKLMT), offset 0x10B .................................................................. 945
Register 150: USB Transmit Control and Status Endpoint 1 Low (USBTXCSRL1), offset 0x112 ............... 946
Register 151: USB Transmit Control and Status Endpoint 2 Low (USBTXCSRL2), offset 0x122 ............... 946
Register 152: USB Transmit Control and Status Endpoint 3 Low (USBTXCSRL3), offset 0x132 ............... 946
Register 153: USB Transmit Control and Status Endpoint 4 Low (USBTXCSRL4), offset 0x142 ............... 946
Register 154: USB Transmit Control and Status Endpoint 5 Low (USBTXCSRL5), offset 0x152 ............... 946
Register 155: USB Transmit Control and Status Endpoint 6 Low (USBTXCSRL6), offset 0x162 ............... 946
Register 156: USB Transmit Control and Status Endpoint 7 Low (USBTXCSRL7), offset 0x172 ............... 946
Register 157: USB Transmit Control and Status Endpoint 8 Low (USBTXCSRL8), offset 0x182 ............... 946
Register 158: USB Transmit Control and Status Endpoint 9 Low (USBTXCSRL9), offset 0x192 ............... 946
Register 159: USB Transmit Control and Status Endpoint 10 Low (USBTXCSRL10), offset 0x1A2 ........... 946
Register 160: USB Transmit Control and Status Endpoint 11 Low (USBTXCSRL11), offset 0x1B2 ........... 946
Register 161: USB Transmit Control and Status Endpoint 12 Low (USBTXCSRL12), offset 0x1C2 .......... 946
Register 162: USB Transmit Control and Status Endpoint 13 Low (USBTXCSRL13), offset 0x1D2 .......... 946
Register 163: USB Transmit Control and Status Endpoint 14 Low (USBTXCSRL14), offset 0x1E2 ........... 946
Register 164: USB Transmit Control and Status Endpoint 15 Low (USBTXCSRL15), offset 0x1F2 ........... 946
Register 165: USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1), offset 0x113 .............. 951
Register 166: USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2), offset 0x123 ............. 951
Register 167: USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3), offset 0x133 ............. 951
Register 168: USB Transmit Control and Status Endpoint 4 High (USBTXCSRH4), offset 0x143 ............. 951
Register 169: USB Transmit Control and Status Endpoint 5 High (USBTXCSRH5), offset 0x153 ............. 951
Register 170: USB Transmit Control and Status Endpoint 6 High (USBTXCSRH6), offset 0x163 ............. 951
Register 171: USB Transmit Control and Status Endpoint 7 High (USBTXCSRH7), offset 0x173 ............. 951
Register 172: USB Transmit Control and Status Endpoint 8 High (USBTXCSRH8), offset 0x183 ............. 951
Register 173: USB Transmit Control and Status Endpoint 9 High (USBTXCSRH9), offset 0x193 ............. 951
Register 174: USB Transmit Control and Status Endpoint 10 High (USBTXCSRH10), offset 0x1A3 ......... 951
Register 175: USB Transmit Control and Status Endpoint 11 High (USBTXCSRH11), offset 0x1B3 .......... 951
Register 176: USB Transmit Control and Status Endpoint 12 High (USBTXCSRH12), offset 0x1C3 ......... 951
Register 177: USB Transmit Control and Status Endpoint 13 High (USBTXCSRH13), offset 0x1D3 ......... 951
Register 178: USB Transmit Control and Status Endpoint 14 High (USBTXCSRH14), offset 0x1E3 ......... 951
Register 179: USB Transmit Control and Status Endpoint 15 High (USBTXCSRH15), offset 0x1F3 ......... 951
Register 180: USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset 0x114 ........................... 955
Register 181: USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset 0x124 ........................... 955
Register 182: USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset 0x134 ........................... 955
Register 183: USB Maximum Receive Data Endpoint 4 (USBRXMAXP4), offset 0x144 ........................... 955
Register 184: USB Maximum Receive Data Endpoint 5 (USBRXMAXP5), offset 0x154 ........................... 955
Register 185: USB Maximum Receive Data Endpoint 6 (USBRXMAXP6), offset 0x164 ........................... 955
Register 186: USB Maximum Receive Data Endpoint 7 (USBRXMAXP7), offset 0x174 ........................... 955
Register 187: USB Maximum Receive Data Endpoint 8 (USBRXMAXP8), offset 0x184 ........................... 955
Register 188: USB Maximum Receive Data Endpoint 9 (USBRXMAXP9), offset 0x194 ........................... 955
Register 189: USB Maximum Receive Data Endpoint 10 (USBRXMAXP10), offset 0x1A4 ....................... 955
Register 190: USB Maximum Receive Data Endpoint 11 (USBRXMAXP11), offset 0x1B4 ....................... 955
Register 191: USB Maximum Receive Data Endpoint 12 (USBRXMAXP12), offset 0x1C4 ...................... 955
Register 192: USB Maximum Receive Data Endpoint 13 (USBRXMAXP13), offset 0x1D4 ...................... 955
Register 193: USB Maximum Receive Data Endpoint 14 (USBRXMAXP14), offset 0x1E4 ....................... 955
Register 194: USB Maximum Receive Data Endpoint 15 (USBRXMAXP15), offset 0x1F4 ....................... 955
Register 195: USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1), offset 0x116 ............... 957
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June 29, 2010
Texas Instruments-Advance Information