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LM3S9B81 Datasheet, PDF (498/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller
Analog-to-Digital Converter (ADC)
13.2
Signal Description
Table 13-1 on page 498 and Table 13-2 on page 498 list the external signals of the ADC module and
describe the function of each. The ADC signals are analog functions for some GPIO signals. The
column in the table below titled "Pin Mux/Pin Assignment" lists the GPIO pin placement for the ADC
signals. Note that when a pin is used as an ADC input, the appropriate bit in the GPIO Analog Mode
Select (GPIOAMSEL) register must be set to disable the analog isolation circuit, and the appropriate
bit in the GPIO Digital Enable (GPIODEN) register must be clear to disable digital function. For
more information on configuring GPIOs, see “General-Purpose Input/Outputs (GPIOs)” on page 294.
Table 13-1. Signals for ADC (100LQFP)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Typea Description
Assignment
AIN0
1
PE7
I
Analog Analog-to-digital converter input 0.
AIN1
2
PE6
I
Analog Analog-to-digital converter input 1.
AIN2
5
PE5
I
Analog Analog-to-digital converter input 2.
AIN3
6
PE4
I
Analog Analog-to-digital converter input 3.
AIN4
100
PD7
I
Analog Analog-to-digital converter input 4.
AIN5
99
PD6
I
Analog Analog-to-digital converter input 5.
AIN6
98
PD5
I
Analog Analog-to-digital converter input 6.
AIN7
97
PD4
I
Analog Analog-to-digital converter input 7.
AIN8
96
PE3
I
Analog Analog-to-digital converter input 8.
AIN9
95
PE2
I
Analog Analog-to-digital converter input 9.
AIN10
92
PB4
I
Analog Analog-to-digital converter input 10.
AIN11
91
PB5
I
Analog Analog-to-digital converter input 11.
AIN12
13
PD3
I
Analog Analog-to-digital converter input 12.
AIN13
12
PD2
I
Analog Analog-to-digital converter input 13.
AIN14
11
PD1
I
Analog Analog-to-digital converter input 14.
AIN15
10
PD0
I
Analog Analog-to-digital converter input 15.
VREFA
90
PB6
I
Analog This input provides a reference voltage used to
specify the input voltage at which the ADC converts
to a maximum value. In other words, the voltage
that is applied to VREFA is the voltage with which
an AINn signal is converted to 1023. The VREFA
input is limited to the range specified in Table
25-2 on page 1082.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
Table 13-2. Signals for ADC (108BGA)
Pin Name
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
Pin Number Pin Mux / Pin
Assignment
B1
PE7
A1
PE6
B3
PE5
B2
PE4
A2
PD7
A3
PD6
C6
PD5
Pin Type
I
I
I
I
I
I
I
Buffer Typea Description
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog-to-digital converter input 0.
Analog-to-digital converter input 1.
Analog-to-digital converter input 2.
Analog-to-digital converter input 3.
Analog-to-digital converter input 4.
Analog-to-digital converter input 5.
Analog-to-digital converter input 6.
498
June 29, 2010
Texas Instruments-Advance Information