LM3S9B81 Datasheet, PDF (1024/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Signal Tables
Table 23-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
65
PB3
I/O
TTL
GPIO port B bit 3.
I2C0SDA
I/O
OD
I²C module 0 data.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
66
PB0
I/O
TTL
GPIO port B bit 0.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
U1Rx
I
TTL
UART module 1 receive. When in IrDA mode, this signal has IrDA
modulation.
USB0ID
I
Analog This signal senses the state of the USB ID signal. The USB PHY
enables an integrated pull-up, and an external element (USB
connector) indicates the initial state of the USB controller (pulled
down is the A side of the cable and pulled up is the B side).
67
PB1
I/O
TTL
GPIO port B bit 1.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
USB0VBUS
I/O
Analog This signal is used during the session request protocol. This signal
allows the USB PHY to both sense the voltage level of VBUS, and
pull up VBUS momentarily during VBUS pulsing.
68
VDD
-
Power Positive supply for I/O and some logic.
69
GND
-
Power Ground reference for logic and I/O pins.
70
USB0DM
I/O
Analog Bidirectional differential data pin (D- per USB specification).
71
USB0DP
I/O
Analog Bidirectional differential data pin (D+ per USB specification).
72
PB2
I/O
TTL
GPIO port B bit 2.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
CCP3
I2C0SCL
I/O
TTL
Capture/Compare/PWM 3.
I/O
OD
I²C module 0 clock.
USB0EPEN
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
73
USB0RBIAS
O
Analog 9.1-kΩ resistor (1% precision) used internally for USB analog
circuitry.
74
PE0
I/O
TTL
GPIO port E bit 0.
CCP3
I/O
TTL
Capture/Compare/PWM 3.
EPI0S8
I/O
TTL
EPI module 0 signal 8.
SSI1Clk
I/O
TTL
SSI module 1 clock.
USB0PFLT
I
TTL
Optionally used in Host mode by an external power source to
indicate an error state by that power source.
75
PE1
I/O
TTL
GPIO port E bit 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
CCP6
I/O
TTL
Capture/Compare/PWM 6.
EPI0S9
I/O
TTL
EPI module 0 signal 9.
SSI1Fss
I/O
TTL
SSI module 1 frame.
1024
Texas Instruments-Advance Information
June 29, 2010