LM3S9B81 Datasheet, PDF(295/1155 Page) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

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LM3S9B81 Datasheet, PDF (295/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

◁

StellarisÂ® LM3S9B81 Microcontroller

C0+, C1-, C1+, C2-, C2+, USB0VBUS, USB0ID). These signals are configured by clearing the DEN

bit in the GPIO Digital Enable (GPIODEN) register. The digital alternate hardware functions are

enabled by setting the appropriate bit in the GPIO Alternate Function Select (GPIOAFSEL) and

GPIODEN registers and configuring the PMCx bit field in the GPIO Port Control (GPIOPCTL)

register to the numeric enoding shown in the table below. Table entries that are shaded gray are

the default values for the corresponding GPIO pin.

Important: All GPIO pins are configured as GPIOs and tri-stated by default (GPIOAFSEL=0,

GPIODEN=0, GPIOPDR=0, GPIOPUR=0, and GPIOPCTL=0) with the exception of the

pins shown in the table below. A Power-On-Reset (POR) or asserting RST puts the pins

back to their default state.

Table 9-1. GPIO Pins With Non-Zero Reset Values

GPIO Pins

PA[1:0]

PA[5:2]

PB[3:2]

PC[3:0]

Default State

UART0

SSI0

I2C0

JTAG/SWD

GPIOAFSEL GPIODEN GPIOPDR GPIOPUR

1

1

0

0

1

1

0

0

1

1

0

0

1

1

0

1

GPIOPCTL

0x1

0x1

0x1

0x3

Table 9-2. GPIO Pins and Alternate Functions (100LQFP)

IO Pin Analog

Digital Function (GPIOPCTL PMCx Bit Field Encoding)a

Function

1

2

3

4

5

6

7

8

9

10

11

PA0 26

-

U0Rx

-

-

-

-

-

- I2C1SCL U1Rx

-

-

PA1 27

-

U0Tx

-

-

-

-

-

- I2C1SDA U1Tx

-

-

PA2 28

- SSI0Clk -

-

-

-

-

-

- I2S0RXSD -

-

PA3 29

- SSI0Fss -

-

-

-

-

-

- I2S0RXMCLK -

-

PA4 30

-

SSI0Rx

-

-

-

CAN0Rx

-

-

- I2S0TXSCK -

-

PA5 31

-

SSI0Tx

-

-

-

CAN0Tx

-

-

- I2S0TXWS -

-

PA6 34

- I2C1SCL CCP1

-

-

-

CAN0Rx

- USB0EPEN U1CTS

-

-

PA7 35

- I2C1SDA CCP4

-

-

-

CAN0Tx CCP3 USB0PFLT U1DCD

-

-

PB0 66 USB0ID CCP0

-

-

-

U1Rx

-

-

-

-

-

-

PB1 67 USB0VBUS CCP2

-

-

CCP1 U1Tx

-

-

-

-

-

-

PB2 72

- I2C0SCL -

-

CCP3 CCP0

-

- USB0EPEN -

-

-

PB3 65

- I2C0SDA -

-

-

-

-

- USB0PFLT -

-

-

PB4 92 AIN10

-

-

-

U2Rx CAN0Rx

-

U1Rx EPI0S23 -

-

-

C0-

PB5 91 AIN11 C0o

CCP5 CCP6 CCP0 CAN0Tx CCP2 U1Tx EPI0S22

-

-

-

C1-

PB6 90 VREFA CCP1 CCP7 C0o

-

-

CCP5

-

- I2S0TXSCK -

-

C0+

PB7 89

-

-

-

-

NMI

-

-

-

-

-

-

-

PC0 80

-

-

-

TCK

-

-

-

-

-

-

-

-

SWCLK

PC1 79

-

-

-

TMS

-

-

-

-

-

-

-

-

SWDIO

PC2 78

-

-

-

TDI

-

-

-

-

-

-

-

-

June 29, 2010

295

Texas Instruments-Advance Information

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