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LM3S9B81 Datasheet, PDF (1052/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller
Signal Tables
Table 23-7. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
C6
PD5
I/O
TTL
GPIO port D bit 5.
AIN6
I
Analog Analog-to-digital converter input 6.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
CCP4
I/O
TTL
Capture/Compare/PWM 4.
EPI0S28
I/O
TTL
EPI module 0 signal 28.
I2S0RXMCLK
I/O
TTL
I2S module 0 receive master clock.
U2Rx
I
TTL
UART module 2 receive. When in IrDA mode, this signal has IrDA
modulation.
C7
VDDA
-
Power The positive supply (3.3 V) for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from VDD to minimize
the electrical noise contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V, regardless of
system implementation.
C8
PH1
I/O
TTL
GPIO port H bit 1.
CCP7
I/O
TTL
Capture/Compare/PWM 7.
EPI0S7
I/O
TTL
EPI module 0 signal 7.
C9
PH0
I/O
TTL
GPIO port H bit 0.
CCP6
I/O
TTL
Capture/Compare/PWM 6.
EPI0S6
I/O
TTL
EPI module 0 signal 6.
C10
PG7
I/O
TTL
GPIO port G bit 7.
CCP5
I/O
TTL
Capture/Compare/PWM 5.
EPI0S31
I/O
TTL
EPI module 0 signal 31.
C11
USB0DM
I/O
Analog Bidirectional differential data pin (D- per USB specification).
C12
USB0DP
I/O
Analog Bidirectional differential data pin (D+ per USB specification).
D1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
D2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
D3
VDDC
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
D10
PH3
I/O
TTL
GPIO port H bit 3.
EPI0S0
I/O
TTL
EPI module 0 signal 0.
USB0EPEN
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
D11
PH2
I/O
TTL
GPIO port H bit 2.
C1o
O
TTL
Analog comparator 1 output.
EPI0S1
I/O
TTL
EPI module 0 signal 1.
D12
PB1
I/O
TTL
GPIO port B bit 1.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
USB0VBUS
I/O
Analog This signal is used during the session request protocol. This signal
allows the USB PHY to both sense the voltage level of VBUS, and
pull up VBUS momentarily during VBUS pulsing.
E1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
1052
Texas Instruments-Advance Information
June 29, 2010