LM3S9B81 Datasheet, PDF (70/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

ARM Cortex-M3 Processor Core
Table 2-1. 16-Bit Cortex-M3 Instruction Set Summary (continued)
Operation
Assembler
No operation
NOP <c>
Bitwise logical OR register values
ORR <Rd>, <Rm>
Pop registers from stack
POP <registers>
Pop registers and PC from stack
POP <registers, PC>
Push registers onto stack
PUSH <registers>
Push LR and registers onto stack
PUSH <registers, LR>
Reverse bytes in word and copy to register
REV <Rd>, <Rn>
Reverse bytes in two halfwords and copy to register
REV16 <Rd>, <Rn>
Reverse bytes in low halfword [15:0], sign-extend, and copy to register
REVSH <Rd>, <Rn>
Rotate right by amount in register
ROR <Rd>, <Rs>
Subtract register value and C flag from register value
SBC <Rd>, <Rm>
Send event
SEV <c>
Store multiple register words to sequential memory locations
STMIA <Rn>!, <registers>
Store register word to register address + 5-bit immediate offset
STR <Rd>, [<Rn>, #<immed_5> * 4]
Store register word to register address
STR <Rd>, [<Rn>, <Rm>]
Store register word to SP address + 8-bit immediate offset
STR <Rd>, [SP, #<immed_8> * 4]
Store register byte [7:0] to register address + 5-bit immediate offset
STRB <Rd>, [<Rn>, #<immed_5>]
Store register byte [7:0] to register address
STRB <Rd>, [<Rn>, <Rm>]
Store register halfword [15:0] to register address + 5-bit immediate offset
STRH <Rd>, [<Rn>, #<immed_5> * 2]
Store register halfword [15:0] to register address + register offset
STRH <Rd>, [<Rn>, <Rm>]
Subtract immediate 3-bit value from register
SUB <Rd>, <Rn>, #<immed_3>
Subtract immediate 8-bit value from register value
SUB <Rd>, #<immed_8>
Subtract register values
SUB <Rd>, <Rn>, <Rm>
Subtract 4 (immediate 7-bit value) from SP
SUB SP, #<immed_7> * 4
Operating system service call with 8-bit immediate call code
SVC <immed_8>
Extract byte [7:0] from register, move to register, and sign-extend to 32 bits SXTB <Rd>, <Rm>
Extract halfword [15:0] from register, move to register, and sign-extend to 32 bits SXTH <Rd>, <Rm>
Test register value for set bits by ANDing it with another register value
TST <Rn>, <Rm>
Extract byte [7:0] from register, move to register, and zero-extend to 32 bits UXTB <Rd>, <Rm>10
Extract halfword [15:0] from register, move to register, and zero-extend to 32 UXTH <Rd>, <Rm>
bits
Wait for event
WFE <c>
Wait for interrupt
WFI <c>
Table 2-2. 32-Bit Cortex-M3 Instruction Set Summary
Operation
Add register value, immediate 12-bit value, and C bit
Add register value, shifted register value, and C bit
Add register value and immediate 12-bit value
Add register value and shifted register value
Add register value and immediate 12-bit value
Bitwise AND register value with immediate 12-bit value
Assembler
ADC{S}.W <Rd>, <Rn>, #<modify_constant(immed_12>
ADC{S}.W <Rd>, <Rn>, <Rm>{, <shift>}
ADD{S}.W <Rd>, <Rn>, #<modify_constant(immed_12)>
ADD{S}.W <Rd>, <Rm>{, <shift>}
ADDW.W <Rd>, <Rn>, #<immed_12>
AND{S}.W <Rd>, <Rn>, #<modify_constant(immed_12>
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June 29, 2010
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