LM3S9B81 Datasheet, PDF (79/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
3 Memory Map
The memory map for the LM3S9B81 controller is provided in Table 3-1.
In this manual, register addresses are given as a hexadecimal increment, relative to the module’s
base address as shown in the memory map. See also Chapter 4, “Memory Map” in the ARM®
Cortex™-M3 Technical Reference Manual.
Note that within the memory map, all reserved space returns a bus fault when read or written.
Table 3-1. Memory Map
Start
End
Memory
0x0000.0000
0x0004.0000
0x0100.0000
0x2000.0000
0x2001.8000
0x2200.0000
0x2230.0000
FiRM Peripherals
0x4000.0000
0x4000.1000
0x4000.2000
0x4000.4000
0x4000.5000
0x4000.6000
0x4000.7000
0x4000.8000
0x4000.9000
0x4000.A000
0x4000.C000
0x4000.D000
0x4000.E000
0x4000.F000
Peripherals
0x4002.0000
0x4002.0800
0x4002.1000
0x4002.1800
0x4002.2000
0x4002.4000
0x4002.5000
0x4002.6000
0x4002.7000
0x0003.FFFF
0x00FF.FFFF
0x1FFF.FFFF
0x2001.7FFF
0x21FF.FFFF
0x222F.FFFF
0x3FFF.FFFF
0x4000.0FFF
0x4000.1FFF
0x4000.3FFF
0x4000.4FFF
0x4000.5FFF
0x4000.6FFF
0x4000.7FFF
0x4000.8FFF
0x4000.9FFF
0x4000.BFFF
0x4000.CFFF
0x4000.DFFF
0x4000.EFFF
0x4001.FFFF
0x4002.07FF
0x4002.0FFF
0x4002.17FF
0x4002.1FFF
0x4002.3FFF
0x4002.4FFF
0x4002.5FFF
0x4002.6FFF
0x4002.7FFF
Description
On-chip Flash
Reserved
Reserved for ROM
Bit-banded on-chip SRAM
Reserved
Bit-band alias of 0x2000.0000 through 0x200F.FFFF
Reserved
Watchdog timer 0
Watchdog timer 1
Reserved
GPIO Port A
GPIO Port B
GPIO Port C
GPIO Port D
SSI0
SSI1
Reserved
UART0
UART1
UART2
Reserved
I²C Master 0
I²C Slave 0
I²C Master 1
I²C Slave 1
Reserved
GPIO Port E
GPIO Port F
GPIO Port G
GPIO Port H
For details,
see page ...
202
-
200
200
-
200
-
474
474
-
307
307
307
307
649
649
-
586
586
586
-
692
705
692
705
-
307
307
307
307
June 29, 2010
79
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