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LM3S9B81 Datasheet, PDF (55/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller
Stellaris® LM3S9B81 Microcontroller
1.1.5
The transmit and receive modules each have an 8-entry audio-sample FIFO. An audio sample can
consist of a Left and Right Stereo sample, a Mono sample, or a Left and Right Compact Stereo
sample. In Compact 16-Bit Stereo, each FIFO entry contains both the 16-bit left and 16-bit right
samples, allowing efficient data transfers and requiring less memory space. In Compact 8-bit Stereo,
each FIFO entry contains an 8-bit left and an 8-bit right sample, reducing memory requirements
further.
Both the transmitter and receiver are capable of being a master or a slave.
The Stellaris® I2S interface has the following features:
■ Configurable audio format supporting I2S, Left-justification, and Right-justification
■ Configurable sample size from 8 to 32 bits
■ Mono and Stereo support
■ 8-, 16-, and 32-bit FIFO interface for packing memory
■ Independent transmit and receive 8-entry FIFOs
■ Configurable FIFO-level interrupt and µDMA requests
■ Independent transmit and receive MCLK direction control
■ Transmit and receive internal MCLK sources
■ Independent transmit and receive control for serial clock and word select
■ MCLK and SCLK can be independently set to master or slave
■ Configurable transmit zero or last sample when FIFO empty
■ Efficient transfers using Micro Direct Memory Access Controller (µDMA)
– Separate channels for transmit and receive
– Burst requests
– Channel requests asserted when FIFO contains required amount of data
System Integration
The LM3S9B81 controller provides a variety of standard system functions integrated into the device,
including:
■ Micro Direct Memory Access Controller (µDMA)
■ System control and clocks including on-chip precision 16-MHz oscillator
■ ARM Cortex SysTick Timer
■ Four 32-bit timers (up to eight 16-bit), with real-time clock capability
■ Eight Capture Compare PWM pins (CCP)
■ Two Watchdog Timers
June 29, 2010
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Texas Instruments-Advance Information