LM3S9B81 Datasheet, PDF (454/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

General-Purpose Timers
Bit/Field
9
8
7:5
4
3
2
Name
CBMMIS
TBTOMIS
reserved
TAMMIS
RTCMIS
CAEMIS
Type
RO
RO
RO
R/W
RO
RO
Reset
0
0
0x0
0
0
0
Description
GPTM Capture B Match Masked Interrupt
Value Description
1 An unmasked Capture B Match interrupt
has occurred.
0 A Capture B Mode Match interrupt has not occurred or is
masked.
This bit is cleared by writing a 1 to the CBMCINT bit in the GPTMICR
register.
GPTM Timer B Time-Out Masked Interrupt
Value Description
1 An unmasked Timer B Time-Out interrupt
has occurred.
0 A Timer B Time-Out interrupt has not occurred or is masked.
This bit is cleared by writing a 1 to the TBTOCINT bit in the GPTMICR
register.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM Timer A Mode Match Masked Interrupt
Value Description
1 An unmasked Timer A Mode Match interrupt
has occurred.
0 A Timer A Mode Match interrupt has not occurred or is masked.
This bit is cleared by writing a 1 to the TAMCINT bit in the GPTMICR
register.
GPTM RTC Masked Interrupt
Value Description
1 An unmasked RTC event interrupt
has occurred.
0 An RTC event interrupt has not occurred or is masked.
This bit is cleared by writing a 1 to the RTCCINT bit in the GPTMICR
register.
GPTM Capture A Event Masked Interrupt
Value Description
1 An unmasked Capture A event interrupt
has occurred.
0 A Capture A event interrupt has not occurred or is masked.
This bit is cleared by writing a 1 to the CAECINT bit in the GPTMICR
register.
454
June 29, 2010
Texas Instruments-Advance Information