LM3S9B81 Datasheet, PDF (827/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
Register 5: Ethernet MAC Data (MACDATA), offset 0x010
Important: Use caution when reading this register. Performing a read may change bit status.
This register enables software to access the TX and RX FIFOs.
Reads from this register return the data stored in the RX FIFO from the location indicated by the
read pointer. The read pointer is then auto incremented to the next RX FIFO location. Reading from
the RX FIFO when a frame has not been received or is in the process of being received returns
indeterminate data and does not increment the read pointer.
Writes to this register store the data in the TX FIFO at the location indicated by the write pointer.
The write pointer is then auto incremented to the next TX FIFO location. Writing more data into the
TX FIFO than indicated in the length field results in the data being lost. Writing less data into the
TX FIFO than indicated in the length field results in indeterminate data being appended to the end
of the frame to achieve the indicated length. Attempting to write the next frame into the TX FIFO
before transmission of the first has completed results in the data being lost.
Bytes may not be randomly accessed in either the RX or TX FIFOs. Data must be read from the
RX FIFO sequentially and stored in a buffer for further processing. Once a read has been performed,
the data in the FIFO cannot be re-read. Data must be written to the TX FIFO sequentially. If an error
is made in placing the frame into the TX FIFO, the write pointer can be reset to the start of the TX
FIFO by writing the TXER bit of the MACIACK register and then the data re-written.
Reads
Ethernet MAC Data (MACDATA)
Base 0x4004.8000
Offset 0x010
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RXDATA
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RXDATA
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:0
Name
RXDATA
Type
Reset Description
RO 0x0000.0000 Receive FIFO Data
The RXDATA bits represent the next word of data stored in the RX FIFO.
June 29, 2010
827
Texas Instruments-Advance Information